GPU Kernel Optimization Lab
Kernel EngineeringTiled matrix multiplication kernels evaluated under simulated 64 KB SRAM budget with HLS loop pipelining and array partitioning.
NeuSym-HLS: Partial symbolic distillation and high-level synthesis for compact, hardware-aware edge inference. Replaces selected DNN layers with analytic expressions through symbolic regression, evaluating across accuracy, latency, and hardware resources.
Tiled matrix multiplication kernels evaluated under simulated 64 KB SRAM budget with HLS loop pipelining and array partitioning.
Production recommendation engine with batched prediction, result caching, and optimized output schemas across international markets.
High-level tensor expressions lowered into generated C++ loop kernels with shape tracking, validation, and fusion support.
Partial symbolic distillation and high-level synthesis for compact edge inference models with hardware-aware evaluation.
FPGA offload inference stack with PYNQ host control, programmable logic, and accuracy validation within 1% of software baseline.
Batch optimization, result caching, output schema design
Tiled kernels, HLS pipelining, memory hierarchy optimization
IR lowering, code generation, shape tracking, operator fusion
FPGA offload, PYNQ, hardware/software co-design
CORSA Lab, UC Irvine
NeuSym-HLS: Symbolic regression for DNN compression with hardware-aware synthesis.
Ingram Micro
Built production recommendation engine with 90% catalog coverage across 28 countries. Validated ranking quality and data consistency internationally.
University of California, Irvine
Master's in Electrical Engineering and Computer Science. Focus on machine learning systems and hardware acceleration.