Swarnalata Panigrahy
ML systems engineer working on inference, compiler transformations, performance-critical kernels, and hardware-aware acceleration.
01
GPU Kernel Optimization Lab
Tiled matrix multiplication kernels evaluated under simulated 64 KB SRAM budget with HLS loop pipelining.
02
Inference Serving System
Production recommendation engine with batched prediction and optimized output schemas.
03
Mini Tensor Compiler
High-level tensor expressions lowered into generated C++ loop kernels with shape tracking.
04
NeuSym-HLS Research
Partial symbolic distillation and high-level synthesis for compact edge inference.
05
Kria KR260 DNN Accelerator
FPGA offload inference stack with PYNQ host control and programmable logic.
2025—present
Graduate Researcher
CORSA Lab, UC Irvine
NeuSym-HLS: Symbolic regression for DNN compression with hardware-aware synthesis.
2022—2024
Associate Engineer — Machine Learning
Ingram Micro
Built production recommendation engine with 90% catalog coverage across 28 countries.